Electronic calculator systems of the type wherein all of the main electronic functions are integrated in a single large cell integrated semiconductor chip or in a small number of such chips, are described in the following U.S. Patent Nos., which are assigned the assignee of this invention:
The concepts of these prior applications have made possible vast reductions in the cost of small personal-size calculators. Continuing efforts to reduce the cost of these products include the design of a single chip calculator system for use in large capacity calculators, such as scientific or business calculators. The chip disclosed herein may be utilized in scientific or business calculators for instance, because this chip has provisions for a number of storage registers, in addition to operational registers, as well as sufficient capacity to solve the more complicated mathematical expressions and functions used in scientific and business calculators including, for example, trigonometric and logarithmic relationships.
The present invention relates to a display system for a microprocessor and more specifically a display system for an electronic calculator. An entire electronic calculator system including the display system of this invention is disclosed. The electronic calculator disclosed is a serial, word organized calculator; however, it would be evident that the display system of this invention may also be used with parallel and digit organized calculators. In the prior art, the number to be displayed at an liquid crystal, light emitting diode vacuum florescence or other display means, was stored in one of the operational registers and means were provided for supplying minus signs, leading zero blanking and decimal point indication. These means were typically hardwired logic circuitry which was responsive, for instance, to flags stored in the calculator flag logic. These schemes, while being effective for displaying normal calculator outputs, however, are cumbersome to use when it was desired to display for instance a plurality of different numbers at the same time, which is done, for instance, when a programmable calculator is caused to display the program loaded therein. Also in the prior art, as exemplified by U.S. Pat. No. 3,919,532, it was known to provide the aforementioned means for supplying the zero blanking by zero suppress circuitry and to halt the automatic zero suppress according to codes stored in a second operational register; however, the means for providing decimal point indication was provided according to flags stored in the calculator flag logic.
It was therefore one object of this invention to provide a display system for an electronic calculator. It was another object of this invention to provide a display system providing for the capability of displaying two separate numbers in a display means at a given time.
It is yet another object of this invention to provide an electronic calculator with a display system providing greater flexibility in the generation of minus signs, decimal points and blanked character positions provided to the display means.
The foregoing objects are achieved according to the present invention as is now described. In a preferred embodiment of the invention a display system is provided on a semiconductor chip, data display system including at least two operational registers, a first one of which is loaded with codes representing, for instance, the numeric characters to be displayed and the second of which is loaded with codes representative of whether a particular character position is to be displayed or blanked and whether minus and decimal point indicators are to be provided in the character positions. The first register is preferably loaded with numeric data received from the output of the calculator's arithmetic unit, for instance, or from other operational storage registers in the calculator system and the contents of the second register is built up according to instruction words contained in the calculator's read-only-memory. Upon entering a display mode, the outputs from the first and second operational registers are provided to a display decoder for decoding the contents of the first and second registers and for encoding an output provided for driving the display means.
Further, the display decoder is provided with a programmable gate for permitting the output of the second register normally indicative of decimal point location to be provided to the output register also during non-display operation, i.e., during a calculation mode. Thus, if the programmable gate in the display decoder is not programmed, the decimal point segments in the display will be actuated according to the codes stored in the second register during non-display operations. Since the contents of the second register will normally be repeatively changed during the normal arithmetic processing, the decimal points of the display will appear to randomly actuate when the calculator is in a calculation mode. If the programmable gate in the display decoder is programmed, on the other hand, the decimal points, along with the character segments, will be blanked during a calculation mode.